Conventional analog-to-digital (ADC) circuitry such as Flash ADC circuitry, Sigma-delta ADC circuitry, and Successive Approximation Register (SAR) circuitry includes complicated sensing mechanisms, such as ladder comparators and additional digital-to-analog converter (DAC) circuitry. This complicated circuitry increase device cost in terms of area and power. In addition, because conventional ADC circuitry does not perform sampling rate compression natively, techniques such as random sampling or random convolution are used for sampling rate and data compression. This again adds to power and area cost.